Evidence-first portfolio · Digital IC verification · GenAI for EDA
Vaisakh Naduvodi Viswambharan
I work on digital IC design and functional verification, and I build GenAI-assisted verification tooling that helps engineers move from intent to reliable evidence with less iteration.
Digital Verification Engineer
- Functional verification and proof-oriented workflows (UVM + formal)
- Assertion strategy, coverage thinking, and debugging discipline
- Systems mindset: correctness, traceability, and repeatable process
GenAI for EDA Builder
- Agentic workflows for RTL, testbenches, and properties
- Tool-centric pipelines with structured IRs and evaluation loops
- Open-source direction via SaxoFlow and reproducible artifacts
Evidence path
A simple, consistent story: intent → implementation → blocks → evidence → interface.
Explore how I work: Formal verification, GenAI for EDA.
Featured artifacts
Three representative anchors: open-source tooling, formal verification, and RTL design integration.
SaxoFlow
Open-source design + verification suite with GenAI-assisted workflows.
Read case study →Floating-point formal verification
RTL-to-RTL model checking with structured helper lemmas and refinement.
Read case study →RISC-V “Kreacher”
RTL design + SoC integration contributions focused on correctness and clean interfaces.
Read case study →If you’re hiring or collaborating
If your team cares about verification quality, proof structure, coverage, or GenAI-assisted tooling, I am open to roles and research collaboration.